1. Field of the Invention
The present invention relates to an error detector that detects data errors. More particularly, the present invention relates to an error detector suitable for installation on an in-vehicle gateway apparatus which relays data among a plurality of communication networks.
2. Description of the Related Art
In recent years, a plurality of ECUs such as an engine ECU, a door controlling ECU, an air-bag ECU, an audio ECU and a navigation ECU have been installed in a vehicle, as shown in FIG. 24. In order for these ECUs to make communication among a plurality of LANs that have different communication protocols and are in different communication speeds installed in a vehicle, a gateway apparatus which serves as an interface is required. Japanese Patent Application Publication Nos. JP-A-2003-244187 and JP-A-2003-264571 disclose technologies of routing function of the gateway apparatus realized in software.
The gateway apparatus relays data sent and received among a plurality of different networks and realizes gateway functions such as communication protocol conversions and packet filtering. Consequently, a communication is made between nodes that are connected to different networks. As a plurality of devices is connected via networks and data is sent and received by communication, data errors in communication may occur. The data stored in a memory may have errors caused by garbled bits and such. While installation of a device with a data check function has been designed to increase the reliability of data, unless otherwise a device to verify that the check function itself is functioning normally is provided, the reliability of data lowers.
In Japanese Utility Model Application Publication No. JP-UM-A-H5-83847, out of data input to memory, a parity bit generated by a parity generator is inverted by an error generator and error data is stored in a memory for parity. In a read cycle, by comparing the data with the memory data, a parity checker is configured to output an error signal.
However, in the invention disclosed in Japanese Utility Model Application Publication No. JP-UM-A-H5-83847, as a diagnostic signal is generated by inverting an output signal of a parity generator by an error generator, when the parity checker is tested, it has not been possible to distinguish a failure of the parity generator from that of the error generator.